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Tetramem Singapore Pte. Ltd.

ASIC Design Verification Engineer

Tetramem Singapore Pte. Ltd.
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  • 3 months ago
  • Over 200 applicants
Exp: 4-14 Years
Singapore

Electronic Components/Semiconductors

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Job Description

Responsibilities:
  • Collaborate with design engineers and architects to define, document and implement detailed test plans for the SoC design verification
  • Build and maintain infrastructure/environment for automation verification of SoC architecture, function and performance
  • Develop reusable testbench, constrained-random/directed test cases, and verification associated behavioral modules for both block levels and system levels.
  • Develop regression strategy, methodology and tools(scripts). Define and measure the function coverage. Close verification holes for design releases and tape-out
  • Work with design engineers to debug and identify root causes of simulation failure
  • Support test engineers for post-silicon validation
  • Mentor and coach junior engineers. Drive verification efficiency

Requirements:
  • In depth knowledge of UVM/OVM, Semiformal Verification, assertion-based verification as well as hardware and software co-verification methodology
  • Extensive experience of building verification infrastructure, test planning, coverage closure, testbench and test cases development for function/performance verification
  • Proficient experience with Verilog, System Verilog, Python/Perl/TCL/Shell scripting, C/C++, System C and industry mainstream ISAs assembly coding
  • Familiarity with MIPI, AMBA (APB/AHB/AXI) bus protocol, RISC-V/ARM or DSP core
  • Experience in verifying designs at both RTL level and post-P&R gate level
  • Ability to work in a startup environment, and to work both independently and as a team player with the ability to provide technical leadership to other members of the engineering team
Experience in one or more of the following areas considered a strong plus:
  • Working knowledge of AI/ML Computing, GPU, ISP architectures and accelerators
  • Experience in verifying mix-signal design and interface of digital and analog
  • Experience of design verification for high-speed IO such as PCIE and DDR

Multiple job openings including Engineer, Senior Engineer, Staff Engineer, Senior Staff Engineer, Principal Engineer, Senior Principal Engineer, etc. position levels and salary are determined by background and experience.

Bachelors/ Degree, Masters/ Post Graduate, PhD/ Doctorate

More Info

Role:Subject Matter Expert

Industry:Electronic Components/Semiconductors

Function:IT/Hardware - Embedded/EDA/VLSI/ASIC/Chip Description

Job Type:Permanent Job

Skills Required

Uvm
Verilog
Arm
Dsp

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Date Posted: 27/05/2024

Job ID: 79991985

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About Company

Tetramem Singapore Pte. Ltd.
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Founded in 2018 by a team of world-class experts, TetraMem is poised to deliver the industry’s most disruptive in-memory computing (IMC) technology for edge applications. The TetraMem team brings together complementary skill sets and technological know-how with 34 patents granted to date spanning materials science, device, circuit design, architecture, and application, as well as a patented six-dimension co-design methodology. TetraMem is the world’s only company to produce a high bit-density multi-level memristor-based accelerator in a commercial foundry, with the technology featured in the March 30, 2023 edition of the journal, Nature. This groundbreaking technology enables memory-based computation, eliminating weight-data movement, substantially improving the energy efficiency and performance of AI and machine learning workloads compared to digital technologies, with scalability well beyond the limits of competing analog technologies.
For more information, please visit https://www.tetramem.com. Follow TetraMem on LinkedIn.

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