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Zerro Power Systems Pte. Ltd.

IC Layout Engineer

Zerro Power Systems Pte. Ltd.
Early Applicant
  • 17 days ago
  • Be among the first 50 applicants
Exp: 2-5 Years
2,800 - 4,000 SGD/m
Singapore
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Job Description

  • Design of block level layout of analog/mixed signal circuits
  • Check all requirements/rules to qualify the database to be ready for Tape out.
  • Team Player
  • familiar with skills include Cadence layout, Cadence schematic capture, using CALIBRE & Hercules verification tools.
  • Complete quality layout and verification within planned schedule

More Info

Role:Other Production/Engineering/R&D

Industry:Other

Function:Manufacturing/Engineering/R&D

Job Type:Permanent Job

Skills Required

Visual Effects
Schematic
Cadence
Cadence Virtuoso
Layout
schematic capture
Analog
cadence spectre

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Date Posted: 07/11/2024

Job ID: 99458667

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