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Curious Tek Pte. Ltd.

Layout Engineer

Early Applicant
  • 13 days ago
  • Be among the first 50 applicants
Exp: 5-7 Years
6,000 - 8,000 SGD/m

Job Description

Job Responsibilities:

  • Develop digital and analog layout in various technologies (e.g., CMOS )
  • Layout analog circuits and IO circuits
  • Analyse and rectify layout verification issues
  • Support the front-end team for System-on-Chip (SoC) integration

Requirements:

  • Possess at least a bachelor's degree or equivalent in Electrical & Electronic Engineering or any related field with background on Integrated Circuit Design (both Analog and Digital)
  • 5 years or above experience in the area of layout design.
  • Knowledge in Electronic Design Automation (EDA) tools (e.g. Cadence, Synopsys, Mentor Graphic Calibre)
  • Knowledge in circuit reliability consideration for layout (e.g., ESD, latch-up, aging, EMIR)
  • Able to trouble-shoot and rectify layout verification error on DRC/LVS and familiar with layout signoff flow.
  • Strong Communication skills, high level of independence, self-motivation and a good team player.

Date Posted: 14/11/2024

Job ID: 100353769

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