The role requires the incumbent to collaborate with cross-functional teams to deliver high-quality IC designs for next-gen IoT/AI chips.
This position involves working on RTL design, module partition, and ensuring compliance with strict quality and timing requirements.
Responsibilities
- Define and design WIFI/BT-related modules, collaborating closely with multidisciplinary teams.
- Develop RTL designs for various blocks, including defining RTL module partitions and timing requirements.
- Review micro-architecture to meet specifications and perform comprehensive design quality checks.
- Work with multi-disciplinary teams to ensure on-time delivery of designs with the highest quality standards.
- Conduct RTL and gate-level simulations, along with unit and system-level testing and verification using EDA tools.
- Assist in developing company documentation and contributing to the generation of patents.
- Analyze synthesis results, focusing on power, timing, and area optimization.
- Ensure proper checks are incorporated at every stage of the design process.
Requirements
- Master's degree in Electrical Engineering (or equivalent).
- 5+ years of experience in IC design or related fields.
- Proficiency in System Verilog for RTL logic design and verification.
- Familiarity with digital MAC/baseband/high-speed interfaces, CPU, or DSP design.
- Experience with SOC system architecture/block definitions, including WiFi, Bluetooth, and GNSS.
- Proficiency in micro-architecture design and RTL coding using Verilog.
- Familiarity with Cadence and Synopsis tools for design and verification.
- Experience with synthesis, focusing on power, timing, and area analysis.
- Strong problem-solving and communication skills, with a team-player mindset.
Skills: verilog,rtl design,bluetooth low energy,soc,rtl coding,static timing analysis,digital ic design
