Amba Jobs

Design Verification Engineer (SOC/ASIC/Verilog)

Permanent Job

Singapore

3-8 years

7000 - 15000 USD monthly

assembly coding RISC-V Uvm assertion-based verification systemverilog MIPI AMBA DSP cores Semiformal Verification C/C++ Ovm Perl Verilog Shell scripting Arm Python Tcl Systemc

7 days ago

Design Verification Engineer (SOC/ASIC/Verilog)

Permanent Job

Singapore

3-8 years

7000 - 15000 USD monthly

assembly coding RISC-V Uvm assertion-based verification systemverilog MIPI AMBA DSP cores Semiformal Verification C/C++ Ovm Perl Verilog Shell scripting Arm Python Tcl Systemc

7 days ago

Design Verification Engineer

Permanent Job

Singapore

0-2 years

Asic verification Ethernet L2/L3 switch/router CPU peripherals USB-2/3 Uvm systemverilog PCIe gen2/3 Flash controller EDA Tools high-speed IO ASIC verification methodology AMBA bus Soc Sata

14 days ago

Design Verification Engineer (SoC/ASIC/RTL)

Permanent Job

Singapore

3-8 years

7000 - 15000 USD monthly

assembly coding RISC-V Uvm assertion-based verification systemverilog MIPI AMBA DSP cores Semiformal Verification C/C++ Ovm Perl Verilog Shell scripting Arm Python Tcl Systemc

9 days ago

Staff Engineer, Design Verification

Permanent Job

Singapore

5-8 years

8000 - 12000 USD monthly

Flow Control Uvm otp systemverilog ARM M/RISC-V Crypto Low-Power DMA Qo5 AMBA AXI/AHB/APS C/C++ Serial Devices MIPI(CSI/DSI) Dsp Makefile Perl Verilog Python

7 days ago

Lead Engineer, Design Verification (IC Chip Design company)

Permanent Job

Singapore

8-12 years

12000 - 15000 USD monthly

Flow Control Uvm otp systemverilog ARM M/RISC-V Crypto Low-Power DMA Qo5 AMBA AXI/AHB/APS C/C++ Serial Devices MIPI(CSI/DSI) Dsp Makefile Perl Verilog Python

7 days ago

RTL Design Engineer (ASIC/SOC/Digital Design/Verilog/System Verilog)

Permanent Job

Singapore

5-7 years

7000 - 15000 USD monthly

Verdi RTL Digital Design systemverilog RISC AXI protocols pre-layout AMBA APB post-layout simulation Vcs Soc Verilog Arm

7 days ago

Design Verification Engineer

Permanent Job

Singapore

0-2 years

5000 - 8000 USD monthly

AMBA ASIC CPU peripherals Vlsi USB-2/3 Flash controller Uvm systemverilog PCIe gen2/3 Ethernet Sata

8 days ago

Senior Design Verification Engineer

Permanent Job

Singapore

0-2 years

7000 - 11000 USD monthly

AMBA ASIC CPU peripherals Vlsi USB-2/3 Flash controller Uvm systemverilog PCIe gen2/3 Ethernet Sata

8 days ago

Design Verification Engineer (SOC/ASIC/Verilog)

Permanent Job

Singapore

3-8 years

7000 - 15000 USD monthly

assembly coding RISC-V Uvm assertion-based verification systemverilog MIPI AMBA DSP cores Semiformal Verification C/C++ Ovm Perl Verilog Shell scripting Arm Python Tcl Systemc

8 days ago

RTL Design Engineer (ASIC/SOC/Digital Design/Verilog/System Verilog)

Permanent Job

Singapore

5-7 years

7000 - 15000 USD monthly

RTL RISC AMBA APB systemverilog post-layout simulation pre-layout Verdi AXI protocols Digital Design Soc Vcs Verilog Arm

9 days ago

RTL Design Engineer (ASIC/SOC/Digital Design/Verilog/System Verilog)

Permanent Job

Singapore

5-7 years

7000 - 15000 USD monthly

Verdi RTL Digital Design systemverilog RISC AXI protocols pre-layout AMBA APB post-layout simulation Vcs Soc Verilog Arm

7 days ago

Staff Engineer, Design Verification

Permanent Job

Singapore

5-8 years

8000 - 12000 USD monthly

Flow Control Uvm otp systemverilog ARM M/RISC-V Crypto Low-Power DMA Qo5 AMBA AXI/AHB/APS C/C++ Serial Devices MIPI(CSI/DSI) Dsp Makefile Perl Verilog Python

7 days ago

RTL Design Engineer (ASIC/SOC/Digital Design/System Verilog/Verilog)

Permanent Job

Singapore

5-7 years

7000 - 15000 USD monthly

Verdi RTL Digital Design systemverilog RISC AXI protocols pre-layout AMBA APB post-layout simulation Vcs Soc Verilog Arm

7 days ago

ASIC Design Verification Engineer

Permanent Job

Singapore

4-14 years

VeriSystem Verilog AMBA bus protocol RISC-V Uvm Verilog Arm Dsp

3 months ago

ASIC RTL Design Engineer

Permanent Job

Singapore

4-14 years

RTL ASIC AMBA RISC-V Verilog Soc System Verilog Arm

3 months ago

Staff Engineer, Design Verification

Permanent Job

Singapore

5-8 years

Flow Control Uvm otp systemverilog ARM M/RISC-V Crypto Low-Power DMA Qo5 AMBA AXI/AHB/APS C/C++ Serial Devices MIPI(CSI/DSI) Dsp Makefile Perl Verilog Python

30 days ago

Hardware Architect (SOC/ASIC)

Permanent Job

Singapore

10-12 years

GEM5 AMBA ASIC NPU RISCV FastSIM CXL Dsp Platform Architect Cpu Soc Verilog Arm Python System Verilog

a month ago

Staff ASIC (IC) Engineer

Permanent Job

Singapore

5-7 years

Ai Uvm HLS Synthesis AMBA VHDL NPU RISCV Memory Systems ASIC Design TPU Cache Design C/C++ Rtl Design Fpga Cpu Bash Gpu Perl Verilog Arm Python Tcl

a month ago

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Amba Jobs

Design Verification Engineer (SOC/ASIC/Verilog)

Design Verification Engineer (SOC/ASIC/Verilog)

Design Verification Engineer

Design Verification Engineer (SoC/ASIC/RTL)

Staff Engineer, Design Verification

Lead Engineer, Design Verification (IC Chip Design company)

RTL Design Engineer (ASIC/SOC/Digital Design/Verilog/System Verilog)

Design Verification Engineer

Senior Design Verification Engineer

Design Verification Engineer (SOC/ASIC/Verilog)

RTL Design Engineer (ASIC/SOC/Digital Design/Verilog/System Verilog)

RTL Design Engineer (ASIC/SOC/Digital Design/Verilog/System Verilog)

Staff Engineer, Design Verification

RTL Design Engineer (ASIC/SOC/Digital Design/System Verilog/Verilog)

ASIC Design Verification Engineer

ASIC RTL Design Engineer

Staff Engineer, Design Verification

Hardware Architect (SOC/ASIC)

Staff ASIC (IC) Engineer