Digital Ic Design Jobs

IC Design Engineer (Semiconductor/IC Development Flow/Analog Circuit Design/Mixed-Signal)

Permanent Job

Singapore

2-4 years

7000 - 15000 USD monthly

advanced CMOS processes Cadence silicon failures Mentor Graphics Tools Analog Circuit Design digital IC design Design RTL Coding design improvements Verification customer needs Digital circuit simulations tape-out Analysis circuit solutions development of design methodologies Floor Planning Layout fundamental theories inventive designs mixed-signal IC development flow Synopsys cross-functional teams Test Plans Analog

8 days ago

IC Design Engineer (Semiconductor/IC Development Flow/Analog Circuit Design)

Permanent Job

Singapore

2-4 years

7000 - 15000 USD monthly

circuit solutions Analysis cross-functional teams RTL Coding circuit simulations Cadence customer needs tape-out inventive designs Verification advanced CMOS processes IC development flow Synopsys Floor Planning Mentor Graphics Tools Analog Circuit Design Digital Layout silicon failures Design design improvements fundamental theories development of design methodologies mixed-signal digital IC design Analog Test Plans

8 days ago

Staff/Sr. Digital IC Design Verification Engineer

Permanent Job

Singapore

8-10 years

Uvm formal verification system emulation C/C++ video analytics programming Video Processing

a month ago

Front-end design (RTL) Lead Research Engineer Heterogeneous Chiplet Systems, IME

Permanent Job

Singapore

0-2 years

power analysis Timing Analysis RTL Implementation Verilog/SystemVerilog System Level Architecture Modeling Digital IC Design Eda Fpga Matlab

20 days ago

Front-end design (RTL) Scientist for Heterogeneous Chiplet Systems, IME

Permanent Job

Singapore

0-2 years

power analysis Timing Analysis RTL Implementation Verilog/SystemVerilog System Level Architecture Modeling Digital IC Design Eda Fpga Matlab

29 days ago

Front-end design (RTL) Scientist for Heterogeneous Chiplet Systems, IME

Permanent Job

Singapore

0-2 years

power analysis Timing Analysis RTL Implementation Verilog/SystemVerilog System Level Architecture Modeling Digital IC Design Eda Fpga Matlab

29 days ago

Semiconductor Design Engineer

Permanent Job

Singapore

5-7 years

micro-architecture design digital ic design Synthesis digital MAC/baseband/high-speed interfaces Timing SOC system architecture/block definitions GNSS Cadence RTL Coding RTL logic design Power area analysis Synopsis tools DSP design WiFi Bluetooth static timing analysis Cpu Verilog Bluetooth Low Energy System Verilog

29 days ago