Rtl Design Jobs

Sr /IC Design Engineer (Design Verification)

Permanent Job

Singapore

0-2 years

5000 - 10000 SGD monthly

invention Analytical Skills Digital IC Design Uvm Rtl Design Ip systemverilog Functional Verification ASIC Ic Vlsi Eda Fpga Soc Flash Computer Architecture Debugging Verilog

5 days ago

Sr /IC Design Engineer (Design Verification)

Permanent Job

Singapore

0-2 years

5000 - 10000 SGD monthly

invention Analytical Skills Digital IC Design Uvm Rtl Design Ip systemverilog Functional Verification ASIC Ic Vlsi Eda Fpga Soc Flash Computer Architecture Debugging Verilog

5 days ago

Staff ASIC Physical Design Engineer

Permanent Job

Singapore

5-7 years

7000 - 14000 SGD monthly

Timing Closure Gds synopsys tools Rtl Design Cadence RTL Synthesis Ic Physical Design Static Timing Analysis Scripting Unix Routing Eda Vba Macros Linux

6 days ago

ASIC Physical Design Engineer

Permanent Job

Singapore

2-5 years

4000 - 8000 SGD monthly

Timing Closure Gds synopsys tools Rtl Design Cadence RTL Synthesis Ic Physical Design Static Timing Analysis Scripting Unix Routing Eda Vba Macros Linux

6 days ago

Staff Engineer/Technical Manager - DFT/MBIST for Advanced Process Node & Package Technology

Permanent Job

Singapore

7-9 years

8000 - 15000 USD monthly

Synopsys physical failure analysis Mentor Rtl Design Tcl Python Perl

5 days ago

Senior ISP RTL Design Manager

Permanent Job

Singapore

3-7 years

System C/C++ image signal processing systemverilog Isp CMOS Image Sensor Catapult HLS tool Rtl Design Verilog Systemc

a month ago

ISP RTL Design Engineer

Permanent Job

Singapore

0-2 years

CAD Mechanical Solidworks

a month ago

Senior/Staff ISP RTL Design Engineer

Permanent Job

Singapore

3-5 years

Digital System systemverilog Isp change behaviours CMOS Image Sensor HW Architecture Result Oriented Problem-solving communication image signal processing Interpersonal C/C++ Catapult HLS tool Verilog Systemc Debugging

a month ago

RTL Designer

Permanent Job

Singapore

5-7 years

6000 - 8000 SGD monthly

Timing Closure Architect Rtl Design Cadence Dft ASIC Ic Electrical Engineering silicon Analog

10 days ago

System Designer Engineer

Permanent Job

Singapore

5-7 years

4000 - 6500 SGD monthly

Construction Electrical power management Gps Rtl Design Analog Circuit Design Customer Oriented systems design web solutions Technical Support Threat Analysis Bluetooth Security Management System Design

12 days ago

System Architecture Engineer (Video System)

Permanent Job

Singapore

5-7 years

5000 - 7000 SGD monthly

Troubleshooting Hardware Interpersonal Skills Active Directory Administration Rtl Design Video compression Video Encoding Ic Technical Support VMware Scripting Networking Windows Virtualization Linux

8 days ago

Design Verification Engineer (SoC/ASIC/RTL)

Permanent Job

Singapore

3-8 years

7000 - 15000 USD monthly

assembly coding RISC-V Uvm assertion-based verification systemverilog MIPI AMBA DSP cores Semiformal Verification C/C++ Ovm Perl Verilog Shell scripting Arm Python Tcl Systemc

5 days ago

Digital Designer Engineer (Senior/Staff)

Permanent Job

Singapore

2-5 years

5000 - 10000 SGD monthly

Mixed Signal Circuit Design Rtl Design Dft Ic Layout Electronics Able To Work Independently Analog Debugging Verilog

19 days ago

Design Verification Engineer (SoC/ASIC/RTL)

Permanent Job

Singapore

2-5 years

7000 - 15000 SGD monthly

architects Documentation Skills MIPI Uvm systemverilog Functional Verification ASIC Electrical Engineering Vlsi Perl Tcl Scripting Test Cases Soc Python Verilog

10 days ago

Design Verification Engineer (SoC/ASIC/RTL)

Permanent Job

Singapore

2-5 years

7000 - 15000 SGD monthly

architects Documentation Skills MIPI Uvm systemverilog Functional Verification ASIC Electrical Engineering Vlsi Perl Tcl Scripting Test Cases Soc Python Verilog

12 days ago

Digital IC Engineer

Permanent Job

Singapore

2-5 years

5000 - 8000 SGD monthly

synopsys tools Flash Memory Mixed Signal Rtl Design Cadence Asic verification Wireless Technologies Arm Processor Fpga System Verilog

24 days ago

Chip Architecture Design Engineer

Permanent Job

Singapore

2-5 years

6500 - 12000 SGD monthly

Electrical 3D Rtl Design Ip engineering design Architecture Design Autocad Civil Engineering Assembly Manufacturing Electronics Mechanical Engineering Solidworks Eda Verilog

22 days ago

NPU ASIC IC Design Engineer Entry-Level

Permanent Job

Singapore

0-1 years

4000 - 6000 SGD monthly

architects Uvm Rtl Design systemverilog ASIC Electrical Engineering Machine Learning Git Natural Language Processing JIRA Vcs Python System Verilog Debugging Verilog Linux C++

27 days ago

Front-end design (RTL) Lead Research Engineer Heterogeneous Chiplet Systems, IME

Permanent Job

Singapore

0-2 years

power analysis Timing Analysis RTL Implementation Verilog/SystemVerilog System Level Architecture Modeling Digital IC Design Eda Fpga Matlab

16 days ago

Design Verification Engineer (SoC/ASIC/RTL)

Permanent Job

Singapore

2-5 years

7000 - 15000 SGD monthly

architects Documentation Skills MIPI Uvm systemverilog Functional Verification ASIC Electrical Engineering Vlsi Perl Tcl Scripting Test Cases Soc Python Verilog

15 days ago

Front-end design (RTL) Lead Research Engineer Heterogeneous Chiplet Systems, IME

Permanent Job

Singapore

5-7 years

5950 - 11900 SGD monthly

Timing Closure Modeling Hardware Circuit Design Cadence Ic Electrical Engineering Vlsi Eda System Design Fpga Soc Matlab System Architecture

19 days ago

Front-end design (RTL) Senior Research Engineer Heterogeneous Chiplet Systems, IME

Permanent Job

Singapore

5-7 years

4500 - 9000 SGD monthly

Timing Closure Modeling Hardware Circuit Design Cadence Ic Electrical Engineering Vlsi Eda System Design Fpga Soc Matlab System Architecture

19 days ago

Front-end design (RTL) Senior Research Engineer Heterogeneous Chiplet Systems, IME

Permanent Job

Singapore

Fresher

17 days ago

Staff ASIC (IC) Engineer

Permanent Job

Singapore

5-7 years

Ai Uvm HLS Synthesis AMBA VHDL NPU RISCV Memory Systems ASIC Design TPU Cache Design C/C++ Rtl Design Fpga Cpu Bash Gpu Perl Verilog Arm Python Tcl

30 days ago

Front-end design (RTL) Scientist for Heterogeneous Chiplet Systems, IME

Permanent Job

Singapore

0-2 years

power analysis Timing Analysis RTL Implementation Verilog/SystemVerilog System Level Architecture Modeling Digital IC Design Eda Fpga Matlab

26 days ago

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rtl design Jobs

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Job Category

Rtl Design Jobs

Sr /IC Design Engineer (Design Verification)

Sr /IC Design Engineer (Design Verification)

Staff ASIC Physical Design Engineer

ASIC Physical Design Engineer

Staff Engineer/Technical Manager - DFT/MBIST for Advanced Process Node & Package Technology

Senior ISP RTL Design Manager

ISP RTL Design Engineer

Senior/Staff ISP RTL Design Engineer

RTL Designer

System Designer Engineer

System Architecture Engineer (Video System)

Design Verification Engineer (SoC/ASIC/RTL)

Digital Designer Engineer (Senior/Staff)

Design Verification Engineer (SoC/ASIC/RTL)

Design Verification Engineer (SoC/ASIC/RTL)

Digital IC Engineer

Chip Architecture Design Engineer

NPU ASIC IC Design Engineer Entry-Level

Front-end design (RTL) Lead Research Engineer Heterogeneous Chiplet Systems, IME

Design Verification Engineer (SoC/ASIC/RTL)

Front-end design (RTL) Lead Research Engineer Heterogeneous Chiplet Systems, IME

Front-end design (RTL) Senior Research Engineer Heterogeneous Chiplet Systems, IME

Front-end design (RTL) Senior Research Engineer Heterogeneous Chiplet Systems, IME

Staff ASIC (IC) Engineer

Front-end design (RTL) Scientist for Heterogeneous Chiplet Systems, IME