Timing Closure Jobs

Sr Design Engineer (Physical Design)

Permanent Job

Singapore

0-2 years

5000 - 10000 SGD monthly

Timing Closure Gds floorplanning Digital IC Design Autocad Dft RTL Synthesis Physical Design Perl Static Timing Analysis Routing Eda Rc

5 days ago

Digital IC Design Engineer (SoC Timing)

Permanent Job

Singapore

0-2 years

5000 - 8000 USD monthly

Logic Synthesis Dft Power structure analytical ASIC Design Timing Closure Problem-solving static timing analysis Linux UNIX Scripting

4 days ago

Sr Design Engineer (Physical Design)

Permanent Job

Singapore

1-3 years

5000 - 10000 USD monthly

Sta CTS RTL Scan taping out complex SOC deep sub-micron routing issues Dft Production Gds Floor Planning Synthesis DRC/LVS Systems Analog Design backend design EDA tools power and timing rc extraction Synopsys ICC2 timing closure sign-off Static Timing Analysis Applications Route Perl Tcl

4 days ago

Senior Digital IC Design Engineer

Permanent Job

Singapore

0-2 years

7000 - 12000 USD monthly

analytical RTL gate-level simulation Interpersonal Problem-solving Logic Synthesis Dft ASIC Design RTL Coding Timing Closure Verification communication static timing analysis UNIX Linux Scripting

4 days ago

Sr Design Engineer (Physical Design)

Permanent Job

Singapore

1-3 years

5000 - 10000 USD monthly

Synthesis RTL DRC/LVS Scan Systems deep sub-micron routing issues Dft Production Gds Analog Design backend design EDA tools Synopsys ICC2 timing closure sign-off Applications Perl Static Timing Analysis Tcl

4 days ago

Senior / Staff Physical Design Engineer

Permanent Job

Singapore

Fresher

4800 - 8600 USD monthly

floorplanning Cadence Physical Design Timing Closure Electrical Engineering Ic Cadence Virtuoso synopsys tools Eda Debugging Programming Static Timing Analysis

4 days ago

IC Design Engineer (Semiconductor/IC Development Flow/Analog Circuit Design)

Permanent Job

Singapore

2-5 years

7000 - 15000 SGD monthly

Timing Closure CMOS Analog Circuit Design Cadence simulations ASIC Graphics Ic Teamwork Skills Electrical Engineering Layout silicon Analog Wireless Soc Debugging

5 days ago

ASIC Physical Design Engineer

Permanent Job

Singapore

2-5 years

4000 - 8000 SGD monthly

Timing Closure Gds synopsys tools Rtl Design Cadence RTL Synthesis Ic Physical Design Static Timing Analysis Scripting Unix Routing Eda Vba Macros Linux

6 days ago

Sr Design Engineer (Physical Design)

Permanent Job

Singapore

0-2 years

5000 - 10000 SGD monthly

Timing Closure Gds floorplanning Digital IC Design Autocad Dft RTL Synthesis Physical Design Perl Static Timing Analysis Routing Eda Rc

5 days ago

Staff ASIC Physical Design Engineer

Permanent Job

Singapore

5-7 years

7000 - 14000 SGD monthly

Timing Closure Gds synopsys tools Rtl Design Cadence RTL Synthesis Ic Physical Design Static Timing Analysis Scripting Unix Routing Eda Vba Macros Linux

6 days ago

Senior Digital IC Design Engineer

Permanent Job

Singapore

5-7 years

7000 - 12000 SGD monthly

Timing Closure Interpersonal Skills Architect power management Cadence Dft ASIC Ic Layout silicon Static Timing Analysis Analog Scripting Unix Soc Linux

8 days ago

RTL Designer

Permanent Job

Singapore

5-7 years

6000 - 8000 SGD monthly

Timing Closure Architect Rtl Design Cadence Dft ASIC Ic Electrical Engineering silicon Analog

10 days ago

IC Design Engineer (Semiconductor/IC Development Flow/Analog Circuit Design/Mixed-Signal)

Permanent Job

Singapore

2-5 years

7000 - 15000 SGD monthly

Timing Closure CMOS Analog Circuit Design Cadence simulations ASIC Graphics Ic Teamwork Skills Electrical Engineering Layout silicon Analog Wireless Soc Debugging

8 days ago

IC Design Engineer (Semiconductor/IC Development Flow/Analog Circuit Design)

Permanent Job

Singapore

2-5 years

7000 - 15000 SGD monthly

Timing Closure CMOS Analog Circuit Design Cadence simulations ASIC Graphics Ic Teamwork Skills Electrical Engineering Layout silicon Analog Wireless Soc Debugging

12 days ago

IC Design Engineer (Semiconductor/IC Development Flow/Analog Circuit Design/Mixed-Signal)

Permanent Job

Singapore

2-5 years

7000 - 15000 SGD monthly

Timing Closure CMOS Analog Circuit Design Cadence simulations ASIC Graphics Ic Teamwork Skills Electrical Engineering Layout silicon Analog Wireless Soc Debugging

10 days ago

Digital IC Design Engineer (SoC Timing)

Permanent Job

Singapore

0-1 years

5000 - 8000 SGD monthly

Timing Closure Interpersonal Skills systemverilog Cadence Dft ASIC Ic Layout silicon Static Timing Analysis Analog Scripting Unix Soc Verilog Linux

8 days ago

Digital IC Design Engineer (SoC Timing)

Permanent Job

Singapore

0-2 years

Logic Synthesis Dft ASIC Power structure Timing Closure Linux static timing analysis UNIX

11 days ago

Senior / Staff Physical Design Engineer

Permanent Job

Singapore

0-1 years

4800 - 8600 SGD monthly

Factory Timing Closure floorplanning Ic Physical Design Electrical Engineering Static Timing Analysis Eda Neural network Debugging

17 days ago

Front-end design (RTL) Senior Research Engineer Heterogeneous Chiplet Systems, IME

Permanent Job

Singapore

5-7 years

4500 - 9000 SGD monthly

Timing Closure Modeling Hardware Circuit Design Cadence Ic Electrical Engineering Vlsi Eda System Design Fpga Soc Matlab System Architecture

19 days ago

Front-end design (RTL) Lead Research Engineer Heterogeneous Chiplet Systems, IME

Permanent Job

Singapore

5-7 years

5950 - 11900 SGD monthly

Timing Closure Modeling Hardware Circuit Design Cadence Ic Electrical Engineering Vlsi Eda System Design Fpga Soc Matlab System Architecture

19 days ago

IC Design Engineer (Semiconductor/IC Development Flow/Analog Circuit Design)

Permanent Job

Singapore

2-5 years

7000 - 15000 SGD monthly

Timing Closure CMOS Analog Circuit Design Cadence simulations ASIC Graphics Ic Teamwork Skills Electrical Engineering Layout silicon Analog Wireless Soc Debugging

19 days ago

Construction Supervisor

Permanent Job

Singapore

2-5 years

2900 - 4000 SGD monthly

Coaching Budgets Construction Timing Closure Site Management Counseling Drawing Electrical Project timings Compliance Attention To Details Carpentry Scheduling Cost Control

18 days ago

IC Design Engineer (Semiconductor/IC Development Flow/Analog Circuit Design/Mixed-Signal)

Permanent Job

Singapore

2-5 years

7000 - 15000 SGD monthly

Timing Closure CMOS Analog Circuit Design Cadence simulations ASIC Graphics Ic Teamwork Skills Electrical Engineering Layout silicon Analog Wireless Soc Debugging

15 days ago

IC Design Engineer (Semiconductor/IC Development Flow/Analog Circuit Design/Mixed-Signal)

Permanent Job

Singapore

2-5 years

7000 - 15000 SGD monthly

Timing Closure CMOS Analog Circuit Design Cadence simulations ASIC Graphics Ic Teamwork Skills Electrical Engineering Layout silicon Analog Wireless Soc Debugging

26 days ago

IC Design Engineer (Semiconductor/IC Development Flow/Analog Circuit Design/Mixed-Signal)

Permanent Job

Singapore

2-5 years

7000 - 15000 SGD monthly

Timing Closure CMOS Analog Circuit Design Cadence simulations ASIC Graphics Ic Teamwork Skills Electrical Engineering Layout silicon Analog Wireless Soc Debugging

24 days ago

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Timing Closure Jobs

Sr Design Engineer (Physical Design)

Digital IC Design Engineer (SoC Timing)

Sr Design Engineer (Physical Design)

Senior Digital IC Design Engineer

Sr Design Engineer (Physical Design)

Senior / Staff Physical Design Engineer

IC Design Engineer (Semiconductor/IC Development Flow/Analog Circuit Design)

ASIC Physical Design Engineer

Sr Design Engineer (Physical Design)

Staff ASIC Physical Design Engineer

Senior Digital IC Design Engineer

RTL Designer

IC Design Engineer (Semiconductor/IC Development Flow/Analog Circuit Design/Mixed-Signal)

IC Design Engineer (Semiconductor/IC Development Flow/Analog Circuit Design)

IC Design Engineer (Semiconductor/IC Development Flow/Analog Circuit Design/Mixed-Signal)

Digital IC Design Engineer (SoC Timing)

Digital IC Design Engineer (SoC Timing)

Senior / Staff Physical Design Engineer

Front-end design (RTL) Senior Research Engineer Heterogeneous Chiplet Systems, IME

Front-end design (RTL) Lead Research Engineer Heterogeneous Chiplet Systems, IME

IC Design Engineer (Semiconductor/IC Development Flow/Analog Circuit Design)

Construction Supervisor

IC Design Engineer (Semiconductor/IC Development Flow/Analog Circuit Design/Mixed-Signal)

IC Design Engineer (Semiconductor/IC Development Flow/Analog Circuit Design/Mixed-Signal)

IC Design Engineer (Semiconductor/IC Development Flow/Analog Circuit Design/Mixed-Signal)