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Digital IC Design Engineer (SoC Timing)

Jobscentral
Early Applicant
  • 14 days ago
  • Be among the first 50 applicants
Exp: 0-2 Years
Singapore
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Job Description

Job Description

  • Work with system engineers on timing requirements and feedback on optimization.
  • Work on SoC timing constraint, synthesis and timing closure.
  • Work on power structure, eg. Isolation of power domains, level-shifter crossing voltage domains
  • Conduct formal verification for release comparison.
  • Support back-end implementation on timing violation analysis and fix.
  • Support scan insertion and optimization.
  • Support on power structure and power optimization.

Job Requirements

  • Bachelor's or Master's Degree in Electronic Engineering with ASIC design experience.
  • Familiar with ASIC design flow
  • Experience in logic synthesis, static timing analysis, timing closure
  • Good understanding of DFT and Power structure.
  • Familiar with UNIX/ Linux environment and scripting
  • Good communication and interpersonal skills

More Info

Industry:Other

Function:Electronics

Job Type:Permanent Job

Skills Required

Logic Synthesis
Dft
ASIC
Timing Closure
Linux
static timing analysis
UNIX

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Date Posted: 13/11/2024

Job ID: 100274197

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